FPGA Based Architecture Implementation for Epileptic Seizure Detection Using One Way ANOVA and Genetic Algorithm

Varsha Harpale and Vinayak Bairagi

Department of Electronics and Telecommunication Engineering, AISSMS’s-Institute of Information Technology, S. P. Pune University, Pune, India.

Corresponding Author E-mail: varshaks3@gmail.com

Abstract:

Epilepsy is a brain disorder which produces recurrent seizures as a storm of the electrical activity of the brain. 70 millions of people living with epilepsy in the world and most of them are from developing countries and near about 12 millions of people are residing from India. In rural areas, seizure disorder is not treated seriously so there is a need for awareness and availability of proper medication. Recurring seizures are the major source of diagnosis of epilepsy so real-time prediction using analytical methods is a need of the research in this area. Electroencephalographic (EEG) signals are the rich source of the early diagnosis of epilepsy. The basic objective of the work is to proposed real time architecture which could be included in existing EEG monitoring and measuring instruments to mark the seizure occurrence. This will facilitate medical practitioners monitoring primary status of patients and understanding frequency of seizure occurrence. Thus the proposed work provide real-time architecture or improved performance reconfigurable solution to contribute in designing real-time seizure detection system. The EEG processing architecture is designed and implemented in this work, which will add values to the existing EEG monitoring and recording system.

Keywords: Electroencephalography (EEG); ANOVA; Epileptic Seizure; Feature Extraction; FPGA-Genetic Algorithm (FPGA-GA)

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